PulsEdge founders bring together histories of entrepreneurial successes (Digital Switch Corporation, Coherent Communication Systems), key engineering skills, and a portfolio of successful product development. The team has worked professionally together over many years in the development of algorithms and signal processing technology and their efficient implementation in state of the art ASICs and FPGAs. 

    Members of the PulsEdge team held key positions in various companies where they lead major research and product development efforts. Their combined backgrounds uniquely blend expertise in adaptive digital signal processing concepts, design, modeling, simulation, and implementation of the innovative algorithms as well as translation of these algorithms into FPGAs and ASICs.

    PulsEdge principals have expertise in the design, simulation, and verification of digital hardware. They developed five generations of state of the art signal processing ASICs and have an impressive record of “first silicon” successes. Their expertise spans configurable processing, FPGAs, custom DSPs, modern computer aided design tools and hardware definition languages.

    The PulsEdge team combines essential analytic and mathematical skills with extensive application experience. We have been awarded numerous patents and have authored number of publications and presentations on topics including communication protocol analysis, control, adaptive filtering and multi dimensional signal processing. We are active contributors to international standards for signal processing of speech in telecommunication systems. We also contributed to Non Destructive Testing standards for the calibration and test of ultrasonic instrumentation.

The following are key areas of expertise:

Algorithm development and implementation
    Adaptive filtering algorithms development, modeling and customization
    Optimal algorithms partitioning, hardware/software architecting and implementation
    Integer and custom floating point formats for efficient hardware utilization
    Embedded custom micro coded DSP development  
    Algorithm prototyping, analysis and modeling using Matlab, Simulink and C++

Configurable computing and FPGA design
    VHDL design, simulation and synthesis
    Static timing analysis
    Verification and validation
    Radiation hardened and high reliability design techniques

ASIC design
    VHDL design, synthesis, pre and post synthesis, place and route simulation          
    Static timing analysis and power optimization
    Scan insertion, JTAG insertion and ATPG
    Verification and validation
    Test bed and development platform design

Ultrasonic arrays and custom instrumentation
     Adaptive positioning control of transducer arrays for Non Destructive Testing inspection
     Analog and digital signal processing for automated inspection analysis

Email:info@pulsedge.com